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  4. MMCacheSim: A Highly Configurable Matrix Multiplication Cache Simulator
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MMCacheSim: A Highly Configurable Matrix Multiplication Cache Simulator

Date Issued
2012-09
Author(s)
Anchev, Nenad
Atanasovski, Blagoj
Abstract
Memory access is the bottleneck of all computations. CPU
cache is introduced to speed up accessing reused and local data. Matrix
multiplication is the most common representative of many linear algebra algorithms which performance directly depends of the cache. Many
cache parameters exist and impact the overall computing performance
such as cache type, line, size, level, associativity, and replacement policy. Therefore an optimal architecture to execute certain compute and
memory intensive algorithm is desirable in most applications.
We have developed MMCacheSim simulator to predict matrix multiplication performance on particular existing or non-existing multiprocessor.
MMCacheSim simulates the execution time and number of cache misses
that matrix multiplication algorithm performs with particular matrix
size and element size executing on processor with different cache size,
line, level associativity, and replacement policy.
Subjects

CPU Cache, Multiproce...

File(s)
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Name

ICTI_2012_submission_44.pdf

Size

282.04 KB

Format

Adobe PDF

Checksum

(MD5):7f6286eff71d8f28fd4d7e33669b6068

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