A case study of C-V hysteresis instability in metal-high-k-oxide-silicon devices with ZrO2/Al2O3/Zr2O2 stack as a charge trapping layer

A. Skeparovski; D. Spassov; A. Paskaleva; N. Novkovski

doi:DOI: 10.1109/MIEL.2017.8190073

A case study of C-V hysteresis instability in metal-high-k-oxide-silicon devices with ZrO2/Al2O3/Zr2O2 stack as a charge trapping layer

Date Issued

2017-12-14

Author(s)

A. Skeparovski; D. Spassov; A. Paskaleva; N. Novkovski

DOI

DOI: 10.1109/MIEL.2017.8190073

Abstract

Charge trapping properties of Al-ZrO 2 /Al 2 O 3 /ZrO 2 -SiO 2 -Si structures were investigated in attempt to elucidate the instability in their C-V hysteresis. The hysteresis in these structures is mainly due to subsequent trapping of electrons and holes injected from the Si substrate. However the competitive process of electron injection from the gate accompanied by the high leakage introduces instability and compromises the memory window.