Novkovski, Nenad

Preferred name
Novkovski, Nenad
Official Name
Novkovski, Nenad
Main Affiliation
Email
nenad@pmf.ukim.mk

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2002 - 200912010 - 20182

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    Item type:Publication,
    PROGRESS IN MATERIALS FOR MICROELECTRONICS AND FURTHER CHALLENGES
    (Macedonian Academy of Sciences and Arts, 2017-04-10)
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    Paskaleva, Albena
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    Spassov, Decho
    Development of materials and technologies for microelectronics is required by the needs of the constantly in-creasing level of integration of microelectronics circuits. Increase of the integration level compels downscaling of all the dimensions of devices, which in its turn requires very thin layers with exceptional quality due to rather high elec-tric fields at working conditions. First, technological improvements are adopted aimed at fabrication of materials with uniform quality, geometrical flatness and extremely low density of intentionally introduced defects. Second, new fab-rication methods are developed providing materials with much better quality. Third, new materials showing better properties than the standard (conventional) ones are obtained and developed further.Decreasing the dimensions of the layers changes the nature of the physical phenomena involved in the func-tioning of devices. Quantum mechanical mechanisms are more and more important in the description of the properties of the materials and devices on the nanoscale. The question arises where is the limit of the possibilities of the materi-als and technologies for nanoscale electronics.
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    Item type:Publication,
    Analysis of Conduction and Charging Mechanisms in Atomic Layer Deposited Multilayered HfO2/Al2O3 Stacks for Use in Charge Trapping Flash Memories
    (Hindawi Limited, 2018)
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    Paskaleva, Albena
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    Spassov, Dencho
    Method for characterization of electrical and trapping properties of multilayered high permittivity stacks for use in charge trapping flash memories is proposed. Application of the method to the case of multilayered HfO2/Al2O3 stacks is presented. By applying our previously developed comprehensive model for MOS structures containing high- dielectrics on the characteristics measured in the voltage range without marked degradation and charge trapping (from −3 V to +3 V), several parameters of the structure connected to the interfacial layer and the conduction mechanisms have been extracted. We found that the above analysis gives precise information on the main characteristics and the quality of the injection layer. characteristics of stressed (with write and erase pulses) structures recorded in a limited range of voltages between −1 V and +1 V (where neither significant charge trapping nor visible degradation of the structures is expected to occur) were used in order to provide measures of the effect of stresses with no influence of the measurement process. Both trapped charge and the distribution of interface states have been determined using modified Terman method for fresh structures and for structures stressed with write and erase cycles. The proposed method allows determination of charge trapping and interface state with high resolution, promising a precise characterization of multilayered high permittivity stacks for use in charge trapping flash memories.
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    Item type:Publication,
    Oxygen annealing modification of conduction mechanism in thin rf sputtered Ta2O5 on Si
    (Elsevier BV, 2002-11)
    Atanassova, E
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    Paskaleva, A
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    Pecovska-Gjorgjevich, M