Kalendar, Marija
Full Name
Kalendar, Marija
Main Affiliation
Email
marijaka@feit.ukim.edu.mk
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Publications
(Articles)
Type
Fulltext
Results 1-4 of 4 (Search time: 0.003 seconds).
Preview | Title | Author(s) | Issue Date | Type | |
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1 | FPGA design of IP packet filter based on SNORT rules | Efnusheva, Danijela; Cholakoska, Ana; Kalendar, Marija | Mar-2020 | Proceeding article | |
2 | "FPGA Design of IP Packet Filter based on SNORT rules" | Kalendar, Marija ; Efnusheva, Danijela; Cholakoska, Ana | Mar-2020 | Article | |
3 | FPGA implementation of IPv6 header processor | Todorov, Zdravko; Efnusheva, Danijela; Cholakoska, Ana; Kalendar, Marija | Mar-2021 | Proceeding article | |
4 | Hardware Implementation of IP Packet Filtering in FPGA | Cholakoska, Ana; Efnusheva, Danijela; Kalendar, Marija | 2019 | Proceeding article |