Mihajloska, Hristina
Preferred name
Mihajloska, Hristina
Official Name
Mihajloska, Hristina
Main Affiliation
Email
hristina.mihajloska@finki.ukim.mk
17 results
Now showing 1 - 10 of 17
- Some of the metrics are blocked by yourconsent settings
Item type:Publication, Distributed Denial of Wallet Attack on Serverless Pay-as-you-go Model(IEEE, 2022-11-15); The serverless pay-as-you-go model in the cloud enables payment of services during execution and resources used at the smallest, most granular level, as was the initial idea when setting the foundations and concepts of the pay-as-you-go model in the cloud. The disadvantage of this method of payment during execution and the resources used is that it is subject to financial damage if we have an attack on serverless services. This paper defines notions for three types of attacks that can cause financial damage to the serverless pay-as-you-go model and are experimentally validated. The first attack is Blast DDoW - Distributed Denial of Wallet, the second attack is Continual Inconspicuous DDoW, and the third one is Background Chained DDoW. We discussed financial damages and the consequences of each type of attack. - Some of the metrics are blocked by yourconsent settings
Item type:Publication, Applications of Quasigroups in Cryptography and Coding Theory(Springer International Publishing, 2023); ; ; ; This survey article discusses some applications of quasigroups in cryptography and coding theory. Here mainly results obtained by the authors of this article are considered and obtained in the last quarter of the century. Not all of their results are presented; emphasis is given to those that were interested for the wider community. Security of the modern world is dependent on the many cryptographic products like block ciphers, stream ciphers, digital signatures and encryption schemes, hash functions, pseudo-random number generators, ... These products are mainly produced by using associative structures (number theory, group and finite field theory, Boolean algebras, etc.) The development of quantum computers questioned security based on associative structures. So, nowadays, the use of quasigroups for building cryptographic products is becoming more important. This short survey presents how quasigroups can be exploited for building suitable cryptographic primitives. For that aim, we define some types of quasigroups that are suitable for that purpose, we give the definitions of several kinds of quasigroup transformations, and we explain the constructions of some types of cryptographic primitives obtained by quasigroup transformations. (We notice that cryptographic properties are not discussed in this survey. The efficiency and security of the crypto products based on quasigroups is an open research problem for cryptographers and cryptanalysts.) The quasigroups are also suitable algebraic structures for building error detecting and error correcting code. We give one type of error detecting code based on quasigroups. Error correcting codes resistant to an intruder attack, so called RCBQ (Random Codes Based on Quasigroups) are given in details, as well as some of their applications in processing images and audio signals. - Some of the metrics are blocked by yourconsent settings
Item type:Publication, Advancing Image Spam Detection: Evaluating Machine Learning Models Through Comparative Analysis(MDPI AG, 2025-05-30) ;Jamil, Mahnoor; ; ;Creutzburg, Reiner - Some of the metrics are blocked by yourconsent settings
Item type:Publication, StegIm: Image in Image Steganography(Springer, Cham, 2022) ;Tasevski, Ivo ;Dobreva, Jovana ;Andonov, Stefan; Today, data security is a significant problem in data communication. Sometimes we do not realize how susceptible we are to cyberattacks and the theft of critical information, including everything, from social network passwords to complete identities. Any system, no matter how sophisticated it is, is vulnerable and susceptible to attack. Steganography is a technique for hiding secret information by adding it in a non-secret file. Also, it can be used in combination with encryption to further conceal or safeguard data. Therefore, in this paper, we present the StegIm model for hiding, retrieving, and detecting images using variants of LSB Encoding Steganography. We present the implementation of the model with different algorithms for hiding the image in another image (shape steganography algorithm and standard delimiter-based steganography algorithm) and give comparison analysis of used algorithms. To further … - Some of the metrics are blocked by yourconsent settings
Item type:Publication, StegIm: Image in Image Steganography(Springer Nature Switzerland, 2022) ;Tasevski, Ivo ;Dobreva, Jovana ;Andonov, Stefan; - Some of the metrics are blocked by yourconsent settings
Item type:Publication, A Survey on Authenticated Encryption--ASIC Designer’s Perspective(ACM, 2017-12-06); ;Bilge Kavun, ElifYalcin, TolgaAuthenticated encryption (AE) has been a vital operation in cryptography due to its ability to provide confidentiality, integrity, and authenticity at the same time. Its use has soared in parallel with widespread use of the Internet and has led to several new schemes. There have been studies investigating software performance of various schemes. However, the same is yet to be done for hardware. We present a comprehensive survey of hardware (specifically ASIC) performance of the most commonly used AE schemes in the literature. These schemes include encrypt-thenMAC combination, block cipher based AE modes, and the recently-introduced permutation-based AE scheme. For completeness, we implemented each scheme with various standardized block ciphers and/or hash algorithms, and their lightweight versions. Our evaluation targets minimizing the timearea product while maximizing the throughput on an ASIC platform. We used 45 nm NANGATE Open Cell Library for syntheses. We present area, speed, time-area product, throughput, and power figures for both standard and lightweight versions of each scheme. We also provide an unbiased discussion on the impact of the structure and complexity of each scheme on hardware implementation. Our results reveal 13-30% performance boost in permutation-based AE compared to conventional schemes and they can be used as a benchmark in the ongoing AE competition CAESAR. - Some of the metrics are blocked by yourconsent settings
Item type:Publication, π-Cipher: Authenticated Encryption for Big Data(Springer International Publishing, 2014-10-15) ;Gligoroski, Danilo; ;Samardjiska, Simona ;Jacobsen, HåkonErlend Jensen, RuneIn today’s world of big data and rapidly increasing telecommunications, using secure cryptographic primitives that are parallelizable and incremental is becoming ever more important design goal. π-Cipher is parallel, incremental, nonce based authenticated encryption cipher with associated data. It is designed with the special purpose of providing confidentiality and integrity for big data in transit or at rest. It has, as an option, a secret part of the nonce which provides nonce-misuse resistance. The design involves operations of several solid cryptographic concepts such as the Encrypt-then-MAC principle, the XOR MAC scheme and the two-pass sponge construction. It contains parameters that can provide the functionality of tweakable block ciphers for authenticated encryption of data at rest. The security of the cipher relies on the core permutation function based on ARX (Addition, Rotation and XOR) operations. π-Cipher offers several security levels ranging from 96 to 256 bits. - Some of the metrics are blocked by yourconsent settings
Item type:Publication, A 16-Bit Reconfigurable Encryption Processor for p-Cipher(IEEE, 2016-05-23); ;El-Hadedy, Mohamed ;Gligoroski, Danilo ;Kulkarni, AmitStroobandt, DirkThis paper presents an improved hardware implementation of a 16-bit ARX (Add, Rotate, and Xor) engine for one of the CAESAR second-round competition candidates, πCipher, implemented on an FPGA. π-Cipher is a nonce-based authenticated encryption cipher with associated data. The security of the π-Cipher relies on an ARX based permutation function, which is denoted as a π-function. The proposed ARX engine has been implemented in just 266 slices, which includes the buffers of the input and the output. It can be clocked at 347 MHz. Also, in this paper, a message processor based on the proposed ARX engine is introduced. The message processor has been implemented in 1114 slices and it can be clocked at 250 MHz. The functionality of the proposed ARX engine was verified on the Xilinx Virtex-7. The new design of the ARX engine allows for almost four times speedup in performance while consuming only 17% larger area than previously published work. We extend our message processor implementation by using parametrized reconfiguration technique after which an area reduction of 27 slices is observed. - Some of the metrics are blocked by yourconsent settings
Item type:Publication, Deep Learning-based Cryptanalysis of Different AES Modes of Operation(Springer, 2022) ;Gjorgjievska Perusheska, Milena; With the advent of machine learning and the development of powerful machines, the problem of decryption takes on a new light and opens new avenues for research. The remarkable rise of technologies and algorithms contributes to the widespread use of machine learning in various cases. One of the uses is in cryptanalysis and attack of algorithms used in cryptographic processes. In this paper, we elaborate the idea by using the deep neural network to perform the known-plaintext attack on AES to restore as many bits as possible, on the given plaintext. Moreover, we perform our experiments on different key sizes and different modes of operation on AES. The results show that the deep neural network can restore the bits in the whole data set with a probability of more than 98%, restore two consecutive bytes with more than 70%, and more than half of the plaintext bytes with a probability of 99%. - Some of the metrics are blocked by yourconsent settings
Item type:Publication, The Hardware Performance of Authenticated Encryption Modes(Faculty of Computer Science and Engineering, Ss. Cyril and Methodius University in Skopje, Macedonia, 2013)Authenticated encryption has long been a vital operation in cryptography by its ability to provide confidentiality, integrity and authenticity at the same time. Its use has progressed in parallel with the worldwide use of Internet Protocol (IP), which has led to development of several new schemes as well as improved versions of existing ones. There have already been studies investigating software performance of various schemes. However, performance of authenticated encryption schemes on hardware has been left as an open question. We study the comprehensive evaluation of hardware performance of the most commonly used authenticated encryption modes CCM, GCM, OCB3 and EAX. These modes are block cipher based with additional authentication data (AAD). In order to make our evaluation fair, we have implemented each scheme with AES block cipher algorithm. In our evaluation, we targeted ASIC platforms and used 45 nm generic NANGATE Open Cell Library for syntheses. In each design, we have targeted minimizing the time-area product while maximizing the throughput. In the results, area, speed, time-area product, throughput, and power figures are presented for each scheme. Finally, we provide an unbiased discussion on the impact of the structure and complexity of each scheme on hardware implementation, together with recommendations on hardware-friendly authenticated encryption scheme design.
