Please use this identifier to cite or link to this item:
http://hdl.handle.net/20.500.12188/25583| DC Field | Value | Language |
|---|---|---|
| dc.contributor.author | Litovski, V | en_US |
| dc.contributor.author | Nieto-Taladriz, O | en_US |
| dc.contributor.author | Zwolinski, M | en_US |
| dc.contributor.author | Trajanov, Dimitar | en_US |
| dc.contributor.author | Bojanić, S | en_US |
| dc.contributor.author | Petković, P | en_US |
| dc.contributor.author | Grnarov, Aksenti | en_US |
| dc.date.accessioned | 2023-01-30T09:16:58Z | - |
| dc.date.available | 2023-01-30T09:16:58Z | - |
| dc.date.issued | 2010 | - |
| dc.identifier.uri | http://hdl.handle.net/20.500.12188/25583 | - |
| dc.description.abstract | The TEMPUS JEP 41107 grant was awarded to four Universities. Two of them from the former Yugoslavia (Serbia, University of Niš, Faculty of Electronic Engineering, and Macedonia, Ss. Cyril and Methodius, University of Skopje, Faculty for electronic engineering and computer sciences), and two from the European Union (Spain, Universidad Politecnica de Madrid, and Great Britain, University of Southampton). The main target of the project was the development and implementation (including accreditation) of a new curriculum: “System on chip design”. In this paper we will review the activities and the achievements of this project as it comes to an end. Experiences related to implementation and mutual collaboration will be outlined briefly, too. | en_US |
| dc.title | TEMPUS JEP 41107-2006-SYSTEM ON CHIP DESIGN, OVERVIEW OF THE REALIZATION | en_US |
| dc.type | Proceedings | en_US |
| dc.relation.conference | XVI Conference DEVELOPMENT TRENDS | en_US |
| item.grantfulltext | open | - |
| item.fulltext | With Fulltext | - |
| crisitem.author.dept | Faculty of Computer Science and Engineering | - |
| Appears in Collections: | Faculty of Computer Science and Engineering: Conference papers | |
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