Lightweight version of π-Cipher

Abstract

In this paper, we describe the lightweight variant of the CAESAR candidate π-Cipher, denoted as π16-Cipher, which provides working with word sizes of 16-bits and security level of 96-bits or 128 bits. It is parallel, incremental, nonce based, tag second-preimage resistant, authenticated encryption cipher with associated data. The basic operations are ARX (Addition, Rotation and XOR) operations. Its security relies on using nonce as pair (PMN, SMN). The design of π-Cipher is highly parallel both for the internal computing engine as well as for the whole crypto primitive. In this paper we provide an optimized low area implementation for 16-bit version of the π-function.