Please use this identifier to cite or link to this item: http://hdl.handle.net/20.500.12188/17224
Title: EDUCache Simulator for Teaching Computer Architecture and Organization
Authors: Marjan Gusev
Blagoj Atanasovski
Sasko Ristov
Nenad Anchev
Keywords: Cache; CPU; Education; Multi-processor; Performance
Issue Date: 13-Mar-2013
Publisher: IEEE
Conference: 2013 IEEE Global Engineering Education Conference (EDUCON)
Abstract: Teaching computer architecture requires a lot of effort by the instructor. Introduction of simulators can improve the teaching process and increases student willingness and easier ability to learn the material. There are many visual simulators that cover courses about computer architecture and design. In this paper we present our EDUCache simulator as a supporting tool in the process of understanding the concepts of both computer architecture and computer organization. It focuses on understanding modern multi-layer, multi-cache and multi-core multi-processors. Apart of EDUCache’s features to teach the students about the fundamentals of computer architecture and organization, it can be also used for performance engineering of software systems, i.e. the students will also discover the importance of necessity of computer architecture which will increase their curiosity for hardware courses in general.
URI: http://hdl.handle.net/20.500.12188/17224
Appears in Collections:Faculty of Computer Science and Engineering: Conference papers

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