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http://hdl.handle.net/20.500.12188/17223
DC Field | Value | Language |
---|---|---|
dc.contributor.author | Sasko Ristov | en_US |
dc.contributor.author | Blagoj Atanasovski | en_US |
dc.contributor.author | Marjan Gusev | en_US |
dc.contributor.author | Nenad Anchev | en_US |
dc.date.accessioned | 2022-04-04T11:51:18Z | - |
dc.date.available | 2022-04-04T11:51:18Z | - |
dc.date.issued | 2013-09-09 | - |
dc.identifier.uri | http://hdl.handle.net/20.500.12188/17223 | - |
dc.description.abstract | EDUCache simulator is developed as a learning tool for undergraduate students learning the course of Computer Architecture and Organization. It gives explanations and details of the processor and exploitation of its cache memory. This paper shows a set of laboratory exercises and several case studies with examples how to use the EDUCache simulator in the learning process. These hands-on laboratory exercises can be also used in learning software performance engineering and to increase the student willingness to learn more hardware based courses in their further studying. | en_US |
dc.publisher | IEEE | en_US |
dc.subject | Education, HPC, CPU Cache, Multiprocessor | en_US |
dc.title | Hands-On Exercises to Support Computer Architecture Students Using EDUCache Simulator | en_US |
dc.type | Proceeding article | en_US |
dc.relation.conference | 2013 Federated Conference on Computer Science and Information Systems | en_US |
item.fulltext | With Fulltext | - |
item.grantfulltext | open | - |
Appears in Collections: | Faculty of Computer Science and Engineering: Conference papers |
Files in This Item:
File | Опис | Size | Format | |
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BCI_2013_submission_51.pdf | 445.85 kB | Adobe PDF | View/Open |
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