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Title: Hands-On Exercises to Support Computer Architecture Students Using EDUCache Simulator
Authors: Sasko Ristov
Blagoj Atanasovski
Marjan Gusev
Nenad Anchev
Keywords: Education, HPC, CPU Cache, Multiprocessor
Issue Date: 9-Sep-2013
Publisher: IEEE
Conference: 2013 Federated Conference on Computer Science and Information Systems
Abstract: EDUCache simulator is developed as a learning tool for undergraduate students learning the course of Computer Architecture and Organization. It gives explanations and details of the processor and exploitation of its cache memory. This paper shows a set of laboratory exercises and several case studies with examples how to use the EDUCache simulator in the learning process. These hands-on laboratory exercises can be also used in learning software performance engineering and to increase the student willingness to learn more hardware based courses in their further studying.
Appears in Collections:Faculty of Computer Science and Engineering: Conference papers

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