Please use this identifier to cite or link to this item: http://hdl.handle.net/20.500.12188/26838
Title: Interhost Orchestration Platform Architecture for Ultrascale Cloud Applications
Authors: Sasko Ristov, Thomas Fahringer, Radu Prodan, Magdalena Kostoska, Marjan Gusev, Schahram Dustdar
Keywords: Memory management, Virtual machine monitors, Random access memory, Prototypes, Cloud computing, Data centers, Data collection, Cloud infrastructure, memory access management, page faults, pre-fetching, virtualization, XEN
Issue Date: May-2021
Publisher: IEEE Internet Computing
Source: S. Ristov, T. Fahringer, R. Prodan, M. Kostoska, M. Gusev and S. Dustdar, "Interhost Orchestration Platform Architecture for Ultrascale Cloud Applications," in IEEE Internet Computing, vol. 25, no. 3, pp. 23-30, 1 May-June 2021, doi: 10.1109/MIC.2020.3034293.
Project: bilateral AUT-MKD project PRE-FETCH: Pro-active Memory Management with Page Faults Prediction in Clouds, financed by Austrian Federal ministry of Science, Research and Economy (BMWFW), and the Ministry of Education and Science of Republic of North Macedonia
Journal: IEEE Internet Computing
Series/Report no.: IEEE Internet Computing;vol. 25, no. 3, pp. 23-30
Abstract: Cloud data centers exploit many memory page management techniques that reduce the total memory utilization and access time. Mainly these techniques are applied to a hypervisor in a single host (intra-hypervisor) without the possibility to exploit the knowledge obtained by a group of hosts (clusters). We introduce a novel interhypervisor orchestration platform to provide intelligent memory page management for horizontal scaling. It will use the performance behavior of faster virtual machines to activate prefetching mechanisms that reduce the number of page faults. The overall platform consists of five modules-profiler, collector, classifier, predictor, and prefetcher. We developed and deployed a prototype of the platform, which comprises the first three modules. The evaluation shows that data collection is feasible in real-time, which means that if our approach is used on top of the existing memory page management techniques, it can significantly lower the miss rate that initiates page faults.
URI: http://hdl.handle.net/20.500.12188/26838
DOI: 10.1109/MIC.2020.3034293.
Appears in Collections:Faculty of Computer Science and Engineering: Journal Articles

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