Please use this identifier to cite or link to this item: http://hdl.handle.net/20.500.12188/17792
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dc.contributor.authorMihajloska Trpcheska, Hristinaen_US
dc.contributor.authorYalcin, Tolgaen_US
dc.contributor.authorGligoroski, Daniloen_US
dc.date.accessioned2022-05-30T09:38:47Z-
dc.date.available2022-05-30T09:38:47Z-
dc.date.issued2012-09-12-
dc.identifier.urihttp://hdl.handle.net/20.500.12188/17792-
dc.description.abstractIn this paper, we present a novel method for realizing S-boxes using non-associative algebraic structures - quasigroups, which - in certain cases - leads to more optimized hardware implementations. We aim to give cryptographers an iterative tool for designing cryptographically strong S-boxes (which we denote as Q-S-boxes) with additional flexibility for hardware implementation. Existence of the set of cryptographically strong 4-bit Q-S-boxes depends on the non-linear quasigroups of order 4 and quasigroup string transformations. The Q-S-boxes offer the option to not only iteratively reuse the same circuit to implement several different strong 4-bit S-boxes, but they can also be serialized down to bit level, leading to S-box implementations below 10 GEs. With Q-S-boxes we can achieve over 40% area reduction with respect to a lookup table based implementation, and also over 16% area reduction in a parallel implementation of Present. We plan to generalize our approach to S-boxes of any size in the future.en_US
dc.publisherSpringer, Berlin, Heidelbergen_US
dc.subjectlightweight cryptography, S-boxes, ASIC implementation, quasigroup S-boxesen_US
dc.titleHow lightweight is the Hardware Implementation of Quasigroup S-boxesen_US
dc.typeProceeding articleen_US
dc.relation.conferenceInternational Conference on ICT Innovationsen_US
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Appears in Collections:Faculty of Computer Science and Engineering: Conference papers
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