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DC FieldValueLanguage
dc.contributor.authorEfnusheva, Danijelaen_US
dc.date.accessioned2022-02-21T11:00:22Z-
dc.date.available2022-02-21T11:00:22Z-
dc.date.issued2020-
dc.identifier.urihttp://hdl.handle.net/20.500.12188/16639-
dc.language.isoenen_US
dc.publisherSpringer International Publishingen_US
dc.titlePerformance Evaluation of RISC-Based Memory-Centric Processor Architectureen_US
dc.typeBook chapteren_US
dc.relation.conferenceAdvances in Intelligent Systems and Computingen_US
dc.identifier.doi10.1007/978-3-030-51974-2_13-
dc.identifier.urlhttp://link.springer.com/content/pdf/10.1007/978-3-030-51974-2_13-
item.fulltextNo Fulltext-
item.grantfulltextnone-
Appears in Collections:Faculty of Electrical Engineering and Information Technologies: Book Chapters
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