Please use this identifier to cite or link to this item:
http://hdl.handle.net/20.500.12188/16639| DC Field | Value | Language |
|---|---|---|
| dc.contributor.author | Efnusheva, Danijela | en_US |
| dc.date.accessioned | 2022-02-21T11:00:22Z | - |
| dc.date.available | 2022-02-21T11:00:22Z | - |
| dc.date.issued | 2020 | - |
| dc.identifier.uri | http://hdl.handle.net/20.500.12188/16639 | - |
| dc.language.iso | en | en_US |
| dc.publisher | Springer International Publishing | en_US |
| dc.title | Performance Evaluation of RISC-Based Memory-Centric Processor Architecture | en_US |
| dc.type | Book chapter | en_US |
| dc.relation.conference | Advances in Intelligent Systems and Computing | en_US |
| dc.identifier.doi | 10.1007/978-3-030-51974-2_13 | - |
| dc.identifier.url | http://link.springer.com/content/pdf/10.1007/978-3-030-51974-2_13 | - |
| item.grantfulltext | none | - |
| item.fulltext | No Fulltext | - |
| Appears in Collections: | Faculty of Electrical Engineering and Information Technologies: Book Chapters | |
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