Full Name
Kalendar, Marija
 
Email
marijaka@feit.ukim.edu.mk
 
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Publications
(Articles)



Refined By:
Subject:  hardware design, FPGA, IDS rules

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PreviewTitleAuthor(s)Issue DateType
1"FPGA Design of IP Packet Filter based on SNORT rules"Kalendar, Marija ; Efnusheva, Danijela; Cholakoska, AnaMar-2020Article